The Future of HPC through Driving Challenges and Enabling Opportunities

author: Thomas Sterling, School of Informatics and Computing, Indiana University Bloomington
published: Sept. 19, 2016,   recorded: June 2016,   views: 32
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It has emerged as a litany of concerns: the end of Moore’s Law, the end of Dennard scaling, the flat-lining of clock rates, power efficiency, parallelism and scalability, reliability, user productivity, and performance portability. Encapsulating all of these is the international quest to achieve Exascale computing by some definable metrics many years and more than an order of magnitude before such a usable accomplishment is likely to be realized. Yet, no clear safe path is charted with conflicting view of what constitutes risk-adverse (and presumably responsible). Is it born out by incremental changes to conventional practices or does it demand innovative and potentially disruptive solutions to problems plaguing the foundations and principles of high end computing systems. This presentation will describe key leading edge accomplishments in the field of HPC with some results less than a week old and discuss certain directions that are forcing changes away from conventional HPC architectures and methodologies. TiahuLight, Knights Landing, and emerging runtime systems are among the innovations now and in the future that will be considered. In so doing, HPC as a field will be exposed as entering the most exciting period of change and exploration since the 1980’s in terms of form and application impact. Questions will be welcomes from the audience throughout the presentation.

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Download slides icon Download slides: ihpcss2016_sterling_future_of_HPC_01.pdf (4.2 MB)


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